// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/b/RAM16K.hdl

/**
 * Memory of 16K registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM16K {
    IN in[16], load, address[14];
    OUT out[16];

    PARTS:
    DMux4Way(in=load,sel=address[0..1],a=a,b=b,c=c,d=d);
    RAM4K(in=in,load=a,address=address[2..13],out=outa);
    RAM4K(in=in,load=b,address=address[2..13],out=outb);
    RAM4K(in=in,load=c,address=address[2..13],out=outc);
    RAM4K(in=in,load=d,address=address[2..13],out=outd);
    Mux4Way16(a=outa,b=outb,c=outc,d=outd,sel=address[0..1],out=out);
}