// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/ALU.hdl

/**
 * The ALU (Arithmetic Logic Unit).
 * Computes one of the following functions:
 * x+y, x-y, y-x, 0, 1, -1, x, y, -x, -y, !x, !y,
 * x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs, 
 * according to 6 input bits denoted zx,nx,zy,ny,f,no.
 * In addition, the ALU computes two 1-bit outputs:
 * if the ALU output == 0, zr is set to 1; otherwise zr is set to 0;
 * if the ALU output < 0, ng is set to 1; otherwise ng is set to 0.
 */

// Implementation: the ALU logic manipulates the x and y inputs
// and operates on the resulting values, as follows:
// if (zx == 1) set x = 0        // 16-bit constant
// if (nx == 1) set x = !x       // bitwise not
// if (zy == 1) set y = 0        // 16-bit constant
// if (ny == 1) set y = !y       // bitwise not
// if (f == 1)  set out = x + y  // integer 2's complement addition
// if (f == 0)  set out = x & y  // bitwise and
// if (no == 1) set out = !out   // bitwise not
// if (out == 0) set zr = 1
// if (out < 0) set ng = 1

CHIP ALU {
    IN  
        x[16], y[16],  // 16-bit inputs        
        zx, // zero the x input?
        nx, // negate the x input?
        zy, // zero the y input?
        ny, // negate the y input?
        f,  // compute out = x + y (if 1) or x & y (if 0)
        no; // negate the out output?

    OUT 
        out[16], // 16-bit output
        zr, // 1 if (out == 0), 0 otherwise
        ng; // 1 if (out < 0),  0 otherwise

    PARTS:
	Mux16(a=x,b[0..15]=false,sel=zx,out=outZx);//zx			+
	Mux16(a=y,b[0..15]=false,sel=zy,out=outZy);//zy			+
	
	Not16(in=outZx,out=outNx1);//nx1
	Not16(in=outZy,out=outNy1);//ny1
	Mux16(a=outZx,b=outNx1,sel=nx,out=outNx);//nx			+
	Mux16(a=outZy,b=outNy1,sel=ny,out=outNy);//ny			+
	
	Add16(a=outNx,b=outNy,out=outF1);//f1					+
	And16(a=outNy,b=outNx,out=outF0);//f0					+
	Mux16(a=outF0,b=outF1,sel=f,out=outF);//f
	
	Not16(in=outF,out=outNo1);//no			+
	Mux16(a=outF, b=outNo1, sel=no, out=out, out[15]=ng, out[0..7]=zr1, out[8..15]=zr2);	+
	
	Or8Way(in=zr1,out=out2);
	Or8Way(in=zr2,out=out3);
	Not(in=out2,out=out4);
	Not(in=out3,out=out5);
	And(a=out4,b=out5,out=zr);
	
}